Structural complexity in semiconductor device development is increasing rapidly, driven by the quest to provide higher performance for tomorrow’s applications. More complex 3D architectures mean added steps in the design and fabrication processes. Any physical or electrical fault which occur during these steps can cause device failures and slow down total production time. To keep pace with this increasing complexity, more advanced, analytical techniques are needed.
Semiconductor failure analysis
Such techniques include electrical failure analysis (EFA) and physical failure analysis (PFA). Tools designed for these purposes must be able to quickly prepare samples to identify issues that can cripple device performance, reliability, and yield.
The added design complexity means isolating such defects is problematic because high-density interconnects and wafer-level stacking provide more places for defects to hide. For instance, current FIB-SEM and laser-GaFIB-SEM instruments are reaching their limits when it comes to preparing high quality cross-sections for quickly analyzing deeply buried defects, making EFA and PFA much more difficult when failure occurs.
As a result, failure analysis can be a time-intensive, and laborious task. Failure analysis engineers must deal with an ever-growing volume of samples to analyze, and it’s challenging to obtain precise data from every single sample. Not only that, but the number of FA tools needing to be managed is expanding. Finally, a lack of automation to handle these instruments and samples means manual sample preparation – a serious bottleneck delaying time-to-data for days or even weeks.

High quality, large-area cross-section of packaging structures in 30 minutes
Ultimately, advanced logic, memory and packaging sample preparation and characterization require an FA tool that provides high throughput, high resolution, and advanced automation capabilities. For time-strapped FA engineers and lab managers, these capabilities help users optimize their workflows and increase productivity. Failure analysis becomes more streamlined for advanced logic (<10nm), advanced memory (3D NAND) and advanced packaging, making it easier and faster to get results.
Want to learn more? We’re getting ready to showcase one of our newest PFIB instruments in a few days. Please register for the event here.
You’ll discover how this tool enables higher sample throughput and better automation for semiconductor failure analysis, reducing your time-to-data to hours instead of days or weeks.
David is a Senior Global Market Development Manager for semiconductors at Thermo Fisher Scientific.
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