AI Semiconductor Solutions | Electron Microscopy & Metrology

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How are we critical to the AI ecosystem?

As chip architecture becomes more complex and manufacturing approaches atomic scales, success relies on the ability to see, measure, and understand what conventional techniques cannot. We play an important role across the AI ecosystem, with solutions supporting logic, memory, advanced packaging, and power devices through sophisticated electron microscopy, metrology, and failure analysis. By helping deliver atomic-scale data, automated workflows, and deep semiconductor experience, we empower customers to improve yield, enhance performance, and support bringing the next generation of AI technologies to market more efficiently.

Logic

TEM EDS map of a fin-view gate-all-around (GAA) nanowire revealing a residual oxide layer in the vertical walls of the fins. The ability to prepare ultra-thin TEM samples and perform precise TEM analysis is critical for quickly determining the root cause during failure analysis of AI logic devices.

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Memory

Plan-view TEM image with metrology overlay of a 3D NAND device. Continued vertical scaling of 3D structures in AI memory chips demands highly accurate measurement of thin-film critical dimensions (CDs) to ensure manufacturing precision and yield.

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Advanced packaging

3D reconstruction of multiple TSV structures. Visualization of nanometer-scale defects in large volumes of data allows a comprehensive understanding of distribution and morphology of defects in AI advanced packaging architectures.

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Power

3D reconstruction reveals defects in a GaN power device. AI chip-driven power integration brings power devices closer to the die, making comprehensive failure analysis indispensable. GaN and SiC power devices are enabling new power architectures while introducing new reliability challenges.

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How do we use AI in TEM sample preparation, metrology, and failure analysis?

TEM sample preparation

We advance semiconductor TEM sample preparation with AI-powered FIB-SEM automation that helps deliver faster, more precise, and highly reproducible results. Machine learning and computer vision automate critical workflows, including milling optimization and real-time lamella endpoint detection. By reducing manual intervention and improving process consistency, we help semiconductor manufacturers increase throughput and produce high-quality TEM samples for advanced node characterization, yield improvement, and next-generation device innovation.

Area of interest targeted with AI lamella endpointing

Metrology

We are advancing semiconductor metrology with AI-powered electron microscopy that helps deliver faster, more accurate measurements. Machine learning automates feature recognition, image analysis, and critical dimension metrology, enabling manufacturers to characterize advanced semiconductor devices with greater speed and precision. By improving measurement consistency, increasing throughput, and accelerating process control, our AI-driven metrology solutions help semiconductor manufacturers improve yield ramp.

AI used to extract contours from irregular shapes, enabling nearest neighbor measurements.

Failure analysis

Our AI-powered workflows streamline semiconductor failure analysis, supporting faster root-cause investigations. These applications automate device recognition, defect localization, feature identification, and data acquisition to reduce manual effort and improve consistency. User-trained AI models enable precise targeting of semiconductor structures, while flexible automation workflows simplify the analysis of complex devices and suspected defect regions. The result is faster, more reproducible defect analysis, higher throughput, and actionable data that reduces time to market.

AI used to automatically identify target features based on trained models.

Frequently asked questions

The Thermo Scientific ELITE System's lock-in thermography (LIT) is a sensitive thermal imaging technique used for failure analysis of advanced logic devices. It enables three-dimensional (x, y, and z) localization of electrical defects, such as leakage paths, shorts, and resistive opens, by detecting minute, periodically modulated temperature changes during device operation. Its exceptional thermal sensitivity and defect localization capability make it well suited for debugging densely integrated logic chips, where conventional thermal imaging may have limited sensitivity and spatial localization accuracy for identifying individual failure sites.

GAA devices require site-specific TEM lamellae with reduced ion-induced damage to preserve nanosheet channels and gate interfaces. The Thermo Scientific Helios 6 HD FIB-SEM combines high-resolution imaging with low-kV final polishing to help reduce amorphization, curtaining, and gallium implantation, enabling the production of electron-transparent lamellae with exceptional quality. This enables accurate atomic-scale characterization of process-induced defects and failure mechanisms in advanced GAA logic devices.

The Thermo Scientific Helios MX1 PFIB-SEM's diagonal milling enables efficient, nanometer-scale through-stack measurements of critical device structures across 300 mm wafers, helping provide process data beyond the capabilities of traditional in-line metrology. Using a high-throughput argon plasma source, it reveals buried features along a sloped cross-section, allowing engineers to measure critical dimensions at defined heights and evaluate etch quality, bowing, twisting, and CD variation to improve process control and device performance.

Plasma FIB (PFIB) enables efficient, large-area cross-sectioning of advanced packaging structures, making it well suited for failure analysis and process characterization of TSVs, microbumps, hybrid bonds, and redistribution layers (RDLs). Its high material removal rate allows engineers to expose buried interfaces and defects faster than conventional Ga⁺ FIB while maintaining excellent cross-section quality. PFIB supports efficient inspection of complex 2.5D and 3D packages, supporting root-cause analysis, process optimization, and yield improvement.

Power devices used in AI applications, such as GaN and SiC transistors, demand failure analysis techniques that preserve delicate material interfaces and electrical characteristics. Gallium-free TEM sample preparation using plasma FIB eliminates Ga implantation and helps reduce preparation-induced damage, supporting accurate characterization of defects, interfaces, and failure mechanisms. This approach provides high-quality TEM lamellae from larger structures, supporting reliable root-cause analysis and development of next-generation AI power electronics.