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SPARK is a knowledge community where semiconductor professionals and industry thought leaders come together to share information on failure analysis, metrology and characterization techniques. Our webinars highlight the latest advances in semiconductor analysis, enabling you to stay at the forefront of an evolving technology and application landscape.
On-demand semiconductor industry webinars
Pinpointing Power MOSFET Defects: An EFA to PFA Workflow Case Study
Find out how a Thermo Fisher customer improved power MOSFET quality and reliability with a fast and accurate workflow for identifying defects.
You will learn:
- About an EFA to PFA workflow designed for power MOSFETs fault analysis.
- How a Thermo Fisher Scientific customer applied this workflow.
- How localizing faults at the nanoscale can help you increase accuracy and accelerate defect analysis.
SPARK 3D Reconstruction in Semiconductors
In this SPARK on-demand webinar, you will learn about:
- The value of 3D reconstruction
- How to perform 3D reconstruction
- How other semiconductor companies use 3D reconstruction
Semiconductor Packaging Challenges
In this SPARK on-demand webinar, you will discover:
- Failure analysis, process metrology, and characterization challenges impacting advanced packaging devices
- Industry-leading assembly failure isolation and analysis workflows, and complete die analysis workflows
Identifying crystalline defects in compound semiconductors using Electron Channeling Contrast Imaging
In this SPARK webinar, you’ll discover how Electron Channeling Contrast Imaging (ECCI) is an optimal solution for imaging threading dislocation in monocrystals and defect visualization.
Introducing the Helios 5 Laser family
Watch this webinar to learn how the latest additions to the Thermo Scientific Helios 5 family of FIB-SEM systems can help you speed up large volume analysis. Now with an integrated femtosecond laser coincident with the scanning electron microscope and focused ion beam.
FIB Circuit Edit Semiconductor Webinar
This SPARK webinar introduces the Thermo Scientific Centrios Advanced Circuit Edit System, which delivers a new level of surgical precision for circuit editing the most advanced logic devices, including (GAA) FETs with EUV patterning and buried power rails.
TR-LADA for Dynamic OFI
Preserving sensitive circuit areas while delivering greater defect localization capabilities is what the new TR-LADA option can do for your Meridian Optical Fault Isolation system.
In this on-demand webinar, find out how TR-LADA can help you improve the productivity of your research. You’ll learn:
- About how TR-LADA enables users to quickly identify design fixes for marginal failing parts and improve yield
- How TR-LADA provides sensitive circuitry information without damaging the device or obscuring defects.
Process Metrology, Failure Analysis, and R&D Solutions for Information Display Technology
From VR headsets to television screens, displays play a vital role in your user experiences.
Watch our webinar to learn about:
- Information display technologies and their unique process metrology, FA, and R&D challenges
- Information about Thermo Fisher Scientific solutions to address process metrology, FA, and R&D challenges
Low kV Backside Circuit Edit Workflow
Or Haimson will share his current work at Annapurna Labs an Amazon company in partnership with Thermo Fisher Scientific on backside FIB circuit edit and advanced process nodes using a low energy focused ion beam. Learn how advances in failure analysis improves turnaround time, saving you time and money.
Automated Semiconductor Sample Preparation Webinar
Manual sampling can introduce errors. Instrument misalignments can impact cut placement accuracy. Producing ultra-thin samples on sub 3 nm nodes can be a highly complicated process. All of this can add up to slower sample turnaround and lost productivity.
What you will learn in this webinar:
- How machine learning for end-pointing helps control final cut thickness and location—supporting the highest-precision cut placements required for 5 nm and GAA process nodes.
- How improved automation helps scale operations and optimize technical resources.
- How enhanced ease-of-use increases sample throughput, analysis confidence, and productivity.
Introducing the Ultimate (S)TEM platform for Advanced Semiconductor Applications
Advanced semiconductor researchers and developers need atomic scale characterization capabilities to perform fast, repeatable, and damage-free analysis.
What will you learn in this webinar:
- About the new (S)TEM and its high-performance capabilities.
- How to eliminate beam damage with fast energy dispersive spectroscopy (EDS) and fast high tension (HT) switching capabilities.
- How the Ultra-X EDS detector system delivers fast and easy compositional analysis on advanced materials, light elements and thin specimens.
SPARK Webinar Series on semiconductor engineering, prototyping, and manufacturing advances
Testing new products for market, debugging designs, prototyping, increasing yield and optimizing process marginalities are daily challenges that semiconductor professionals confront. This SPARK webinar series gives you new insights into failure analysis and device innovations with dedicated tools. Learn how electrical failure analysis systems, (S)TEM solutions and dual-beam FIBs, and the latest logic and memory nanoprobing workflows make your profession life easier.
Semiconductor Failure Analysis Using Helios PFIB: Webinar
Advanced analytical tools specifically designed for failure analysis must be able to quickly handle sample preparation and isolate minor electrical or physical defects – defects that can destroy device performance, reliability, and yield.
What will you learn in this webinar:
- Learn how the Helios 5 PFIB supports high throughput preparation of advanced logic, 3D memory and packages.
- Discover how the Helios 5 PFIB delivers unique, automated delayering of memory and logic devices.
- Gain an understanding of how SmartAlign and SEMFLASH increase productivity.
Semiconductor Sample Preparation for Atom Probe Tomography Webinar
Advances in semiconductor design mean smaller and more complex architectures are used in the manufacturing process. Atom probe tomography is used in characterizing these architectures, as it enables accurate visualization and analysis at high resolution.
However, in order to precisely characterize samples using atom probe tomography, clean and uniform sample preparation is necessary. This is difficult to achieve using current high kV cleaning methods, because these techniques damage the sample surface.
What will you learn in this webinar:
- Learn about a precise, low kV cleaning process for atom probe tomography – a method that delivers clean, high quality samples, as well as better depth control to reach the region of interest (ROI).
- Learn how this process can automate atom probe tomography sample preparation, increasing productivity for users.
Style Sheet for Global Design System
Style Sheet for Komodo Tabs