Search Thermo Fisher Scientific
c7c8 - Key/Specs/Resources/Appl/Tech/Doc/Contact
The rapid growth in advanced packaging applications, complex interconnect schemes and higher performance power devices is creating unprecedented failure localization and analysis challenges. Defective or underperforming semiconductor devices often show an anomalous distribution of the local power dissipation, leading to local temperature increases. Thermo Scientific ELITE system utilizes Lock-in IR Thermography (LIT) to accurately and efficiently locate these areas of interest.
LIT is a form of dynamic IR thermography which provides a much better signal-to-noise ratio, increased sensitivity and higher feature resolution than steady-state thermography. LIT can be used in IC analysis to locate line shorts, ESD defects, oxide damage, defective transistors and diodes, and device latch-ups. LIT is performed in a natural ambient environment without requiring light-shielding boxes.
Capabilities:
- The highest sensitivity thermal emission system available in the market
- Real-time lock-in measurement
- Differential temperature resolution of < 1 mK after a few seconds; < 10 μK after a few hours
- Contactless absolute temperature mapping
- Through-package and stacked die analysis
- Six position turret with custom lenses optimized for MWIR emission
Stacked die analysis
Stacked-die present a unique challenge to the analyst. Whether dealing with a bonded or TSV die stack, LIT may be used to locate defects in X, Y and Z deep within the die stack on fully packaged devices.
"Unlimited" data accumulation time for better resolution
The higher the lock-in frequency, the higher the resulting spatial resolution. However, the higher frequency tends to reduce significantly the thermal emission to be detected. This is a limitation for many LIT systems. ELITE system overcomes this limitation by offering a unique system architecture in which higher frequency LIT data can be accumulated for an "unlimited" amount of time. Data resolution improves the longer data acquisition continues.
Longer acquisition time results in better sensitivity
The longer the system acquires data, the better the sensitivity. This is particularly valuable when attempting to acquire data at very low power levels or when one must acquire data from a weak failure mode.
Optional lens flexibility
The ELITE system is available with either a single lens and camera configuration or with the flexibility of a 6-position turret. A variety of custom, high-quality, MWIR microscope objectives are available including: 28 mm wide angle, 1x, 5x, and 10x yield an effective magnification of 20x, coupled with the 15 μm pixel pitch of the 640 InSb camera.
Style Sheet for Products Table Specifications
Lateral resolution |
|
Depth resolution |
|
| Defect types |
|
Sample types |
|
FOV |
|
DUT stimulation |
|
Time to results |
|
*Performance may vary depending on sample and specific setup.
Style Sheet for Komodo Tabs
The ability to locate a thermal source in 3D makes the ELITE system well-suited for stacked-die analysis.
Sensitivity varies with power level.
The ability to locate a thermal source in 3D makes the ELITE system well-suited for stacked-die analysis.
Sensitivity varies with power level.
Semiconductor Device Packaging
Advanced semiconductor device packaging requires new integration approaches and innovation in performance, power efficiency, area, and cost. See how Thermo Scientific failure analysis workflows provide fast, precise, and accurate time-to-data for device packaging development.
Semiconductor Pathfinding and Research
Advanced electron microscopy, focused ion beam, and associated analytical techniques for identifying viable solutions and design methods for the fabrication of high-performance semiconductor devices.
Yield Ramp and Metrology
We offer advanced analytical capabilities for defect analysis, metrology, and process control, designed to help increase productivity and improve yield across a range of semiconductor applications and devices.
Semiconductor Failure Analysis
Increasingly complex semiconductor device structures result in more places for failure-inducing defects to hide. Our next-generation workflows help you localize and characterize subtle electrical issues that affect yield, performance, and reliability.
ESD Semiconductor Qualification
Every electrostatic discharge (ESD) control plan is required to identify devices that are sensitive to ESD. We offer a complete suite of test systems to help with your device qualification requirements.
Power Semiconductor Device Analysis
Power devices pose unique challenges for localizing faults, primarily as a result of power device architecture and layout. Our power device analysis tools and workflows quickly pinpoint fault locations at operating conditions and provide precise, high-throughput analysis for characterization of materials, interfaces and device structures.
Display Module Failure Analysis
Evolving display technologies aim to improve display quality and light conversion efficiency to support applications in different industry sectors, while continuing to reduce production costs. Our process metrology, failure analysis and research and development solutions help display companies solve these challenges.
Physical and Chemical Characterization
Ongoing consumer demand drives the creation of smaller, faster, and cheaper electronic devices. Their production relies on high-productivity instruments and workflows that image, analyze, and characterize a broad range of semiconductor and display devices.
Thermal Fault Isolation
Uneven distribution of local power dissipation can cause large, localized increases in temperature, leading to device failure. We offer unique solutions for thermal fault isolation with high-sensitivity lock-in infrared thermography (LIT).
ESD Compliance Testing
Electrostatic discharge (ESD) can damage small features and structures in semiconductors and integrated circuits. We offer a comprehensive suite of test equipment which verifies that your devices meet targeted ESD compliance standards.
Thermal Fault Isolation
Uneven distribution of local power dissipation can cause large, localized increases in temperature, leading to device failure. We offer unique solutions for thermal fault isolation with high-sensitivity lock-in infrared thermography (LIT).
ESD Compliance Testing
Electrostatic discharge (ESD) can damage small features and structures in semiconductors and integrated circuits. We offer a comprehensive suite of test equipment which verifies that your devices meet targeted ESD compliance standards.
Style Sheet to change H2 style to p with em-h2-header class
Electron microscopy services for
semiconductors
To ensure optimal system performance, we provide you access to a world-class network of field service experts, technical support, and certified spare parts.
Electron microscopy support and resources
Style Sheet for Support and Service footer
Style Sheet for Fonts
Style Sheet for Cards