Non-Destructive Semiconductor Defect Detection in Advanced Packaging Technology

Key highlights

• Compared to conventional package designs, semiconductor defect detection is more difficult for advanced packaging because failure sites are smaller, more deeply embedded, and are distributed across more material interfaces 

• Non-destructive techniques such as X-ray computed tomography, scanning acoustic microscopy, and lock-in thermography provide critical information on advanced packages that can facilitate higher-resolution analysis with destructive techniques 

• A full workflow that integrates non-destructive localization with higher-resolution imaging and elemental analysis is becoming increasingly critical for the development of advanced semiconductor packages 

Compared to other semiconductor devices, the advanced packages used for AI and other high-performance computing applications integrate more dies, interconnects, and metal layers into smaller, denser architectures. This complexity makes defects harder to see, localize, and characterize; as a result, non-destructive inspection techniques are becoming an increasingly critical first step in defect and failure analysis workflows. The challenge is not simply finding a defect; it is connecting electrical and thermal behavior with structural data into a complete picture of the root cause. Methods such as X-ray computed tomography (XCT), scanning acoustic microscopy (SAM), and lock-in thermography (LIT) can all contribute to non-destructive analysis of advanced structures, supporting failure analysis of dense 2.5D, 3D, high-bandwidth memory (HBM), and chiplet-based packages. 

Why are advanced packaging defects difficult to detect? 

High-performance computing workloads, such as AI, move large amounts of data quickly between logic, memory, and specialized compute elements. To support this, semiconductor manufacturers increasingly rely on advanced packaging architectures such as 3D stacks, HBM, through-silicon vias (TSVs), microbumps, or chiplet-based heterogeneous structures. 

While these architectures can help increase bandwidth and integrate more functionality into a smaller footprint, they also make failure analysis more difficult. Critical failure sites may be buried inside stacked structures, hidden below dense metal layers, or distributed across multiple material interfaces. Defects may occur across TSVs, microbumps, and any number of heterogeneous interfaces. 

For failure analysis teams, this means inspection results need to be interpreted as part of larger analytical workflows. The identification of hotspots, void-like features, or acoustic reflections may not fully elucidate the failure, and could only provide an indication of where to investigate next. 

The benefits of non-destructive defect localization

No single method can reveal every defect type, and a combination of XCT, SAM, and LIT data is often necessary to fully understand and localize defects. As they are non-destructive, they can all be applied prior to follow-up root-cause analysis, although this could substantially slow down the overall analytical workflow. Non-destructive inspection is therefore most beneficial as a way to quickly identify regions of interest for subsequent sample preparation and/or destructive higher-resolution characterization, which can consist of targeted cross-sectioning, TEM imaging, elemental analysis, and more.

What can X-ray CT reveal about advanced semiconductor packages?

Non-destructive X-ray computed tomography can provide 3D structural insight that help engineers inspect internal package features such as TSVs, microbumps, and solder joints, as well as any voids, cracks, and package-level defects that these may contain. XCT is especially useful when critical structures are buried inside the package. 

The capabilities of XCT are, however, limited by the density of AI-focused packages, as their metal-rich structures can strongly absorb X-rays, which can create artifacts, limit penetration, and reduce image quality. Low-density materials such as polymers and oxides can also be difficult to distinguish when contrast is limited. Higher-resolution scans can provide more details, but these likely require longer scan times, making them less practical for high-volume analysis.

What is the role of scanning acoustic microscopy in defect detection? 

Scanning acoustic microscopy detects changes at material interfaces, using ultrasound to identify internal discontinuities such as delamination, adhesion failures, and bond integrity issues. Interfacial defects have a particularly significant impact on advanced packages because AI-driven architectures combine materials that respond differently to thermal and mechanical stress. 

Similar to XCT, scanning acoustic microscopy faces a tradeoff between resolution and penetration. Lower-frequency SAM can inspect deeper into a package, but with lower resolution. Higher-frequency SAM can improve resolution for thinner layers, microbumps, or bonding interfaces, but penetration depth decreases. This makes scanning acoustic microscopy valuable for detecting interface-related defects, especially delamination and voiding, but less effective when the issue involves fine interconnect defects, deeply buried features, or metal-dense structures. 

How lock-in thermography helps localize electrical failures in advanced packages

Lock-in thermography helps localize defects by detecting abnormal thermal changes across a device, which can be associated with electrical or material failures such as shorts, joint failures, and resistive defects. Lock-in thermography is particularly useful for failure analysis of advanced packaging, because many failures first appear as electrical symptoms that result in localized heating. 

Lock-in thermography helps you pursue fine structural insight with greater confidence by showing where abnormal thermal activity occurs. It does not, however, reveal detailed geometry, composition, or the nanoscale failure mechanism behind hotspots; these necessitate additional analysis. 

Why semiconductor root cause identification requires multi-modal failure analysis

The limitations of these various non-destructive methods can affect yield learning, reliability assessment, and production timelines, as they could require multiple inspection passes to correlate electrical, thermal, structural, and material data. This is especially important for AI-driven packages because they consist of many tightly integrated components and interconnect paths. Even a small defect in a buried interconnect can have a substantial impact on electrical performance and long-term reliability. 

As a result, advanced packaging teams should think about defect detection as a connected workflow rather than a single inspection event. Strong failure analysis combines non-destructive testing and localization with high-resolution, 3D imaging and elemental analysis that leverages technologies such as FIB-SEM and TEM. Together, these methods can span the entire investigative process from localization to root-cause confirmation. 

What are critical considerations for advanced packaging manufacturers?

As AI-driven semiconductor packaging continues to scale, inspection challenges will likely become more complex. Failure analysis workflows that combine non-destructive localization with precise sample preparation and high-resolution analysis can help engineers move more efficiently from a suspected defect location to root-cause confirmation. 

Thermo Fisher Scientific supports advanced packaging failure analysis across wafer, die, and device levels, from defect localization and site-specific sample preparation to high-resolution imaging and elemental analysis. These connected workflows reveal buried defects and failure mechanisms, supporting yield and reliability improvements in complex 2.5D, 3D, HBM, and chiplet-based architectures. 

For more information on advanced packaging failure analysis, including common failure mechanisms, inspection techniques, and multi-level workflows from wafer to die and device, explore our “Innovative failure analysis solutions for advanced packaging” whitepaper > 

Learn more about other Thermo Scientific failure analysis solutions for the semiconductor industry >